Resolving mismatches between signal bus creation and extraction

Signal buses are by nature very flexible objects, which can take as inputs any kind of signal-type variable within Simcenter Amesim. This high degree of flexibility can sometimes cause issues, as it may result in mismatches between signals entering into a bus creator, and the components which are connected to these signals downstream, once they are extracted.

Typically, this mismatch is due to an incompatibility (i.e. a difference in dimension or structure) of the signals being connected, and will result in the sketch being impossible to close. Users are therefore obliged to resolve these mismatches before proceeding to the next steps in the modeling workflow.

Note

Since variable dimensions may change depending on submodel choices, a sketch may be fully closed when mismatches occur. It is therefore important to ensure that submodels connected between signals running through signal buses are compatible.

In order to alleviate this issue and simplify troubleshooting, specific highlighting is applied to parts of the sketch where this type of signal incompatibility arises.

Figure 421: A signal incompatibility in a simple signal bus circuit

As the figure above shows, hovering over a highlighted component will display a text box informing you that some connections are no longer compatible. Furthermore, clicking the More... link will display an explicit visual illustration of where the mismatch is occurring:

Figure 422: Details regarding a dimension incompatibility

As can be seen, the signal entering the bus is of dimension 3, whereas the component connected to the selector component expects a variable of dimension 1.

With this information readily available, the user can subsequently resolve these specific issues one by one, either by modifying the source signal, or by adjusting the components farther downstream so as to avoid the incompatibility that has been identified.