Exporting an Simcenter Amesim model on a Multicore Real-Time target
Example: dSPACE multicore target
For using multicore dSPACE real-time targets (DS1005 or DS1006), the dSPACE Real-Time Interface for Multiprocessor Systems (RTI-MP) needs to be installed. It is assumed that RTI-MP has already been set up correctly and validated (for instance with the examples provided by dSPACE).
Procedure
The Simcenter Amesim -dSPACE export workflow involves the Simulink Coder™. Consequently, the steps described in the Preparing the model section need to be followed first.
On the newly created Simulink sketch (see Figure 32, for example), the two blocks called "Multiprocessor Setup" and "Default CPU" need to be inserted. See figure below.
Figure 33: dSPACE RTI-MP Default CPU and Multiprocessor Setup blocks
- The CPU to which separated blocks on the Simulink sketch will be executed can be specified by configuring the "Default CPU" block (e.g. set it as "master").
Figure 34: dSPACE RTI-MP Default CPU block configuration
- Select parts of Simulink system that will be executed on the slaves by inserting dSPACE interprocess communication (IPC) blocks on all inputs and outputs accordingly (channels). The result in the example of the Subsystem decomposition on the Simcenter Amesim side section can be seen in the figure below.
Note Instead of using several blocks for the interface between master and slaves, it is strongly advised to only put one block for the inputs, and one for the outputs (with "mux" and "demux" components to switch between vector variables and scalar variables). Indeed, multiplying the blocks can decrease the overall performance of your model and even cause overruns by adding too much overhead to the simulation.
Figure 35: Simulink sketch suitable for exporting on dSPACE multiprocessor
Note Note that IPC blocks are equipped with a "swinging buffer" for breaking potential implicit loops formed by the system. It is advised to set the Communication Channel Protocol to "Unsynchronized Swinging Buffer" for a better repartition of the CPU load.
- Configure the Simulink Coder™ as for a single processor export. However, do not specify any Simcenter Amesim model.
Figure 36: Simulink Coder configuration
- In the dSPACE multiprocessor setup interface, click on the Build Options… button of each Slave or Master tab (see the figure below). Note that the name of the corresponding Simcenter Amesim slave or master model needs to be specified each time, as shown in Figure 38 and Figure 39.
Figure 37: Master tab of the dSPACE RTI-MP setup GUI
Figure 38: Master build options
Figure 39: Slave build options
- Click successively on the Build All and the Download buttons of the Main tab, to complete the export procedure.
Figure 40: Main tab of the dSPACE RTI-MP GUI
Source: https://docs.sw.siemens.com/en-US/doc/254352342/PL20250521841123434.amesim_collection.Real_Time/Example_dSPACE_DS_DS_multicore_target · retrieved 2026-07-17